Switch-less bidirectional amplifier

ABSTRACT

A bi-directional amplifier, transceiver, integrated circuit, mobile unit, telecommunication infrastructure for amplification of signals received or signals to be transmitted in a communication circuit and a method for bi-directional amplification comprising amplifying signals in a bi-directional amplifier and directing a signal between two or more different paths comprising at least one first biased semiconductor amplification element coupled to a at least one first impedance matching network, at least one second biased semiconductor amplification element coupled to a second impedance matching network, a first device for biasing the at least one first biased semiconductor amplification element and a second device for biasing the at least one second biased semiconductor amplification element where the direction of signal amplification in said bi-directional amplifier is controlled by the first or second device for biasing the at least one first or second biased semiconductor amplification element.

TECHNICAL FIELD

The present invention relates to bidirectional amplifiers as they arefor example used in microwave transceivers.

BACKGROUND OF THE INVENTION

At present in the field of microwave systems equipped with a commonreceive and transmit antenna it is desired to use a common leg for bothtransmit and receive signal paths. This is not a problem when usingpassive reciprocal components. However, when using active components oneencounters a problem, since amplifiers by definition are non-reciprocal.Normally, one uses external switches and one or two amplifiers to switchbetween signal paths and amplification in one or the other direction.

An illustration of this principle is given in the form of two examplesin FIG. 1.

The problem with such a configuration is that the switches occupyvaluable area on the circuit chip and introduce signal losses. Thesesignal losses have a negative impact on the linearity and the noisefigure of the transceiver circuit. Moreover, the switches exhibit a moreor less unpredictable current leakage which degrades the performance ofsuch a transceiver circuit.

One solution that is based on the principle of example (a) in FIG. 1 isdescribed in the Japanese patent application JP632663808. This documentuses switching of two groups of two transistors by applying suitablebias voltage to the respective transistor group, where the first groupof transistors amplifies a signal incident on a first terminal and thesecond group a signal incident on a second terminal of the circuit. Thissolution however, is not a true bidirectional solution, since theamplifiers in both groups always amplify a signal in one direction only.Also, the amount of amplifiers takes up valuable space on the circuitboard.

One other solution based on the principle of example (b) in FIG. 1 isshown in “Wideband bidirectional MMIC amplifiers for new generation T/Rmodule”. However, this solution also is not really a bidirectionalsolution either, since the amplifiers only amplify the signal in onedirection. The four-port and above all the cross-coupled structuredescribed also introduce undesired signal losses.

In addition to the more or less standard solutions, U.S. Pat. No.5,821,813 describes a structure in which a transistor amplifier isbiased in such a way that it can amplify a signal in both directions.However, since the transistor is connected in “common-gate” mode to therest of the circuit, additional output impedance compensation circuitryis needed to keep the output of the transistor amplifier stable, thustaking up additional valuable space on the circuit board or chip.Separate regulation of the drain-, gate- and source-voltages is alsonecessary.

Finally, U.S. Pat. No. 5,821,813 describes a solution in which twotransistor amplifiers are used as a bidirectional amplifier. Apart fromadding one more transistor to the circuit board which occupiesadditional space and adds to the noise figure of the amplified signal,an additional variable impedance matching network is needed in order tomatch the output impedance of the one of the transistors to the inputimpedance of one other transistor adding to the complexity of thecircuit.

The object of the present invention is therefore to rectify some or allof the disadvantages with prior art.

SUMMARY OF THE INVENTION

According to a first aspect of the invention the above object isachieved by a bi-directional amplifier for amplification of signalsreceived or signals to be transmitted in a communication circuit, wherethe bi-directional amplifier comprises at least one first biasedsemiconductor amplification element connected to a first impedancematching network, at least one second biased semiconductor amplificationelement connected to a second impedance matching network, a first devicefor biasing the at least one first biased semiconductor amplificationelement and a second device for biasing the at least one second biasedsemiconductor amplification element where the direction of signalamplification in said bi-directional amplifier is controlled by thefirst or second device for biasing the at least one first or secondbiased semiconductor amplification element.

In this fashion use of switches which normally entails signal losses inan amplification circuit and leakage currents is avoided.

Also, by using biased semiconductor amplification elements the valuablearea occupied by the bi-directional amplifier according to the inventionis drastically minimized. At the same time signals entering the circuit,be it received signals or signals to be transmitted, may be amplified onthe same transmission line without switching.

One possible configuration in which the at least one first and at leastone second biased semiconductor amplification elements may be connectedis an anti-parallel configuration. The advantage of this configurationis a symmetrical amplification circuit which can amplify in thedirection desired only by choosing which biased semiconductoramplification element is to be biased for no current (under thethreshold) and which one is to be biased for amplification, i.e. abovethe threshold.

Apart from that, these at least two biased semiconductor amplificationelements may be connected so as to provide parallel feedback. Parallelfeedback is a simple way of achieving equal input and output impedancein the circuit in order to avoid signal reflections due to impedancemismatch. Impedance matching is important when the bi-directionamplifier is to be used in a microwave-based communication circuit.

In this context, the at least at least one first and at least one secondsemiconductor amplification elements may comprise discrete semiconductorcomponents operable in the microwave frequency range even though thebi-directional amplifier according to the present invention may be usedin other frequency ranges.

However, these biased semiconductor amplification elements may equallybe integrated into an integrated circuit device. Especially inintegrated circuits common in microwave applications, so called MMICs(Monolithic Microwave Integrated Circuits), the use of thebi-directional amplifier according to the present invention isadvantageous, since MMIC switches which are normally necessary forswitching the direction of signal amplification are thereby madeobsolete. Also, the integrated solution for the bi-directional amplifieraccording to the invention would further reduce the area occupied on thechip by the bi-directional amplifier.

The at least one first and second biased semiconductor amplificationelements may comprise elements from the group of bi-polar transistors,HBTs (Heterojunction Bi-polar Transistors), MOSFETs (Metal OxideSemiconductor Field Effect Transistors), HEMTs (High Electron MobilityTransistors) and other types of biased semiconductor amplificationelements suitable for use as amplification elements.

In one embodiment of the present invention, the at least one first andat least one second biased semiconductor amplification elements areconnected to a first impedance matching network which is an inputimpedance matching network for the at least one first biasedsemiconductor amplification element and an output impedance matchingnetwork for the at least one second biased semiconductor amplificationelement and where the at least one second impedance matching network isan output impedance matching network for the at least one first biasedsemiconductor amplification element and an input impedance matchingnetwork for the at least one second biased semiconductor amplificationelement.

According to another embodiment of the present invention a thirdimpedance matching network is connected between the at least one firstand at least one second biased semiconductor amplification elements,respectively.

The advantage of this configuration is the possibility to use thebi-directional amplifier to direct and amplify a signal in a desireddirection without the disadvantages introduced when using a switch.

According to yet another embodiment of the present invention the atleast one first biased semiconductor amplification element is furtherconnected in parallel with N−1 biased semiconductor amplificationelements, each connected to their individual impedance matchingnetworks, wherein the N−1 biased semiconductor amplification elementsare connected in parallel to the at least one second biasedsemiconductor amplification element, where the at least one first biasedsemiconductor amplification element and the at least one second biasedsemiconductor amplification elements are adapted to act as an N-to-1 or1-to-N switch, since the circuit in this case is bi-directional.

Also, one may equally provide for a configuration where at least onesecond biased semiconductor amplification element is further connectedin parallel with N−1 other biased semiconductor amplification elements,each connected to their individual impedance matching networks, wherethe at least one first and the at least one second biased semiconductoramplification element and the N−1 other biased semiconductoramplification elements connected in parallel with the at least onesecond transistor are adapted to act as a 1-to-N or N-to-1 switch.

In an even more general configuration one may provide for a first biasedsemiconductor amplification element connected in parallel with N−1 otherbiased semiconductor amplification elements each connected to theirindividual impedance matching networks, where the second biasedsemiconductor amplification element is connected in parallel with N−1other biased semiconductor amplification elements each connected totheir individual impedance matching networks, and where N−1 biasedsemiconductor amplification elements are connected in parallel with thefirst biased semiconductor amplification element, where the first biasedsemiconductor amplification element, the second biased semiconductoramplification element and the N−1 biased semiconductor amplificationelements are connected in parallel with the second biased semiconductoramplification element and adapted to act as a bi-directional N-to-Nswitch.

The main advantage of the three configurations mentioned above is theavoidance of the use of switches taking up valuable space on the chipwhile at the same time being able to both direct and amplify a signal inthe desired direction irrespective whether it is a received signal or asignal to be transmitted by the circuit. The last configurationmentioned above would make it possible to direct and amplify signal formany direction into any other direction without using switches.

According to yet another embodiment of the present invention, at leastone first biased semiconductor amplification element is connected into aparallel feedback configuration with at least one impedance element,where the at least one first biased semiconductor amplification elementis connected to at least one first impedance matching network, a commonimpedance matching network and where at least one second biasedsemiconductor amplification element is connected in a parallel feedbackconfiguration with an impedance element, the second biased semiconductoramplification element being further connected to the common impedancematching network and where the at least one second biased semiconductoramplification element being further connected to a second impedancematching network.

By using this configuration, the bi-directional amplifier according tothe invention may be used to combine two unidirectional input channelsinto one output channel.

According to yet another embodiment of the present invention, at leastone first pair of biased semiconductor amplification elements comprisingat least one first biased semiconductor amplification element and atleast one second biased semiconductor amplification element areconnected in an anti-parallel configuration to each other, where the atleast one pair of biased semiconductor amplification elements is furtherconnected to at least one first impedance matching network and onecommon impedance matching network, where the bi-directional amplifierfurther comprises at least one second pair of biased semiconductoramplification elements which in turn comprises at least one third biasedsemiconductor amplification element and at least one fourth biasedsemiconductor amplification element connected in an anti-parallelconfiguration to each other, where said at least one second pair ofbiased semiconductor amplification elements is connected to the commonimpedance matching network and at least one second impedance matchingnetwork.

In this fashion two bi-direction channels may be combined into oneoutput channel.

According to another aspect of the present invention the object of theinvention is achieved by a method for bi-directional amplification ofsignals received or signals to be transmitted in a communication networkwhere the method comprises the steps of:

a) obtaining a bi-directional amplifier comprising at least one firstbiased semiconductor amplification element connected to a firstimpedance matching network, at least one second biased semiconductoramplification element connected to a second impedance matching networkwhich further comprises a first device for biasing the first biasedsemiconductor amplification element and a second device for biasing thesecond biased semiconductor amplification elementb) amplifying a signal received at the first or the second biasedsemiconductor amplification element or a signal to be transmitted fromthe first or the second biased semiconductor amplification element bybiasing the second biased semiconductor amplification element for zerocurrent, while biasing the first biased semiconductor amplificationelement for non-zero current or by biasing the first biasedsemiconductor amplification element for zero current, while biasing thesecond based semiconductor for non-zero current.

The method is especially suited to be used with the embodiment of thebi-directional amplifier described above.

According to another aspect of the present invention the object of theinvention is achieved by a method for amplifying signals in abi-directional amplifier comprising the steps of:

a) connecting at least one first biased semiconductor amplificationelement to at least one first impedance matching network and at leastone first biasing network;

b) connecting at least one second biased semiconductor amplificationelement to at least one second impedance matching network and at leastone second biasing network;

c) connecting the at least one first and second biased amplificationelements in series or in parallel to each other;

d) using the at least one first and second biasing network to bias theat least one first biased semiconductor amplification element belowthreshold and the at least one second biased semiconductor amplificationelement above threshold or vice-versa in order to amplify a signalreceived or to be transmitted through the bi-directional amplifier.

According to yet another aspect of the present invention the object ofthe invention is achieved by a method for directing a signal between twoor more different paths which comprises the steps of:

a) connecting at least one first biased semiconductor amplificationelement to at least one first impedance matching network and at leastone first biasing network;

b) connecting one or more additional first biased semiconductoramplification elements in parallel to the at least one first biasedsemiconductor amplification element;

c) connecting one or more additional first impedance matching networksto each of the one or more first biased semiconductor amplificationelements;

d) connecting at least one second biased semiconductor amplificationelement to the at least one first biased semiconductor amplificationelement, at least one first impedance matching network and at least onefirst biasing network

e) connecting one or more additional second biased semiconductoramplification elements in parallel to the at least one second biasedsemiconductor amplification element;

f) connecting one or more additional second impedance matching networksto each of the one or more second biased semiconductor amplificationelements;

g) connecting at least one additional first biasing network to each ofthe one or more additional first biased semiconductor amplificationelements and at least one additional second biasing network to each ofthe one or more additional second biased semiconductor amplificationelements; andh) biasing at least one of the first biased semiconductor amplificationelements above threshold and at least one of said second biasedamplification elements below threshold or vice versa in order to directand amplify a received signal or a signal to be transmitted through thebi-directional amplifier.

In this fashion signals may be both directed in the desired directionand amplified, but also multiplexed or demultiplexed in case more thanone first and second semiconductor amplification element is biased aboveand below threshold, while avoiding the disadvantages when using aswitch to switch signals.

According to yet another aspect of the present invention the object ofthe same is achieved by a bi-directional transceiver for signals in acommunication circuit comprising at least one first biased semiconductoramplification element with a corresponding first impedance matchingnetwork and at least one second biased semiconductor amplificationelement with a corresponding second impedance matching network, a firstdevice for biasing the first biased semiconductor amplification elementand a second device for biasing the second biased semiconductoramplification element, where the first and the second biasedsemiconductor amplification elements are connected in an anti-parallelconfiguration in relation to each other and that the first and thesecond devices for biasing are adapted to alternatively bias the firstand the second biased semiconductor amplification elements.

This aspect of the present invention may be applied in microwavetransceiver circuits using one antenna for both transmission andreception of communication signals.

According to yet another aspect of the present invention the object ofthe same is achieved by an integrated circuit comprising abi-directional amplifier for amplification of signals received orsignals to be transmitted in a communication circuit, comprising atleast one first biased semiconductor amplification element connected toa first impedance matching network, at least one second biasedsemiconductor amplification element connected to a second impedancematching network, a first device for biasing the first biasedsemiconductor amplification element and a second device for biasing thesecond biased semiconductor amplification element characterized in thatthe direction of signal amplification is controlled by the first or thesecond device for biasing the first or second biased semiconductoramplification element and where the first and the second biasedsemiconductor amplification elements are connected in an anti-parallelconfiguration.

This integrated circuit may find application in MMIC circuits, but couldeasily be adapted to perform its function in other types of integratedcircuits.

According to yet another aspect of the present invention the object ofthe same is achieved by a mobile unit comprising a bi-directionalamplifier for amplification of signals received or signals to betransmitted in a communication circuit, comprising at least one firstbiased semiconductor amplification element connected to a firstimpedance matching network, at least one second biased semiconductoramplification element connected to a second impedance matching network,a first device for biasing the first biased semiconductor amplificationelement and a second device for biasing the second biased semiconductoramplification element characterized in that the direction of signalamplification is controlled by the first or the second device forbiasing the first or second biased semiconductor amplification elementand where the first and second biased semiconductor amplificationelements are connected in an anti-parallel configuration.

Finally, according to yet another aspect of the present invention theobject of the same is achieved by a telecommunications infrastructurecomponent comprising a bi-directional amplifier for amplification ofsignals received or signals to be transmitted in a communicationcircuit, comprising at least one first biased semiconductoramplification element connected to a first impedance matching network,at least one second biased semiconductor amplification element connectedto a second impedance matching network a first device for biasing thefirst biased semiconductor amplification element and a second device forbiasing the second biased semiconductor amplification elementcharacterized in that the direction of signal amplification iscontrolled by the first or the second device for biasing the first orsecond biased semiconductor amplification elements and where the firstand said second biased semiconductor amplification elements areconnected in an anti-parallel configuration.

These and other advantages of the present invention will become clearerwith the following detailed description of some of the embodiments ofthe present invention with reference to the accompanying drawings.

SHORT DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates two examples of prior art bi-directional amplifiers

FIG. 2 shows a first embodiment of the present invention withamplification in one direction

FIG. 3 show the embodiment of FIG. 2 with amplification in the oppositedirection

FIG. 4 shows a second embodiment of the present invention where twounidirectional channels are combined into one channel.

FIG. 5 shows the embodiment of FIG. 4 where two unidirectional channelsare combined into one channel along a different route.

FIG. 6 shows yet another embodiment of the present invention withselection of one of two unidirectional channels

FIG. 7 shows the embodiment of FIG. 6 with the selection of the otherunidirectional channel

FIG. 8 shows another embodiment of the present invention with forwardingof one channel among one other unidirectional channel

FIG. 9 shows the embodiment of FIG. 8 with forwarding of one channelamong one other unidirectional channel

FIG. 10 shows yet another embodiment of the present invention where twobi-directional channels are combined into one channel.

FIG. 11 shows the embodiment of FIG. 10 where two bi-directionalchannels are combined into one channel along a different route

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Turning now to FIG. 2, a first embodiment of the present invention isshown. Here, an example of the inventive bi-directional amplifier isshown, where reference numbers 230 and 240 depict a first and a secondtransistor connected in an anti-parallel configuration in relation toeach other using parallel feedback.

Anti-parallel in this case means the gate terminal of the firsttransistor 230 is connected to the drain terminal of the secondtransistor and the gate terminal of the second transistor 240 isconnected to the drain terminal of the first transistor 230. Theresistor 270 between the first and second transistors (230, 240) is oneway of achieving equal impedance for the two transistors. Of course anyother means, such as an impedance matching network may be used toachieve the equal input impedance for the two transistors.

Even though the embodiments of the present invention described in theaccompanying drawings use FETs (Field Effect Transistors) asamplification devices, it is equally possible to use other types ofamplification devices, such as, for example, elements from the group ofbi-polar transistors, HBTs (Heterojunction Bi-polar Transistors, HEMTs(High Electron Mobility Transistors) and other types of biasedsemiconductor amplification elements suitable for use as amplificationelements. The terms gate, drain and source terminals used for FETsshould then be replaced by corresponding terms commonly used for theterminals of the respective amplification device.

A first input impedance matching network 210 is connected to the gateterminal of the first transistor 230 and the resistor 270 common to thetwo transistors (230, 240) and a second impedance matching network 220is connected to the gate terminal of the second transistor and theresistor 270 common to the two transistors (230, 240). The secondimpedance matching network 220 acts as an output impedance matchingnetwork for the second transistor 240 as well as input impedancematching network for first transistor 230 and the first input impedancematching network 210 acts as an output impedance matching network forthe first transistor 230 and as input impedance matching network forsecond transistor 240. Although many types of transistors serving therole of amplifiers may be used in the arrangement of the presentinvention, this example illustrates the use of two MOSFET (Metal OxideSemiconductor Field Effect Transistor).

In a microwave communication circuit, it is of utmost importance to keepinput and output impedances of each transistor matched to the lineimpedance, since unmatched input and output impedances lead to signallosses, stability problems, frequency ripple and other undesiredproblems due to signal reflection.

According to the present invention, a signal which is to be amplifiedmay, for example, enter the electric circuit in FIG. 2 at the point 260.This signal passes the first impedance matching network 210 and arrivesat the gate of the second transistor 240. Now, in order to amplify thesignal propagating from left to right, the first amplifier 230 is biasedin pinch-off mode (illustrated with the dotted symbol in FIG. 2) andthus the first transistor 230 is effectively turned off. At the sametime, the second amplifier is biased above threshold and thereforeturned on. Hence the signal entering the circuit at the point 260 andpropagating to the right, passing the first impedance matching network210 and the second transistor 240 will be amplified by the secondtransistor 240 and pass through the second impedance matching network220 and out of the circuit at point 261.

The direction of amplification 250 is indicated by the arrow pointing tothe right.

Since the circuit in FIG. 2 is a bi-directional circuit, the points 260and 261 may be either input and output terminals or vice versa.

The circuit if FIG. 3 is identical to the bi-directional amplifiercircuit of FIG. 2, and therefore the reference numbers from FIG. 2 havebeen retained.

Turning now to FIG. 3, if a signal passing from the point 261 to theleft, thus passing the second impedance matching network 220 andarriving at the gate terminal of the first transistor 230, is to beamplified, the second transistor 240 is biased in pinch-off mode, thuseffectively being turned-off, while the first transistor 230 is biasedabove threshold, thus amplifying the signal traveling from right toleft. The direction of amplification is also illustrated by the arrow251 pointing to the left. Similarly to the case in FIG. 2, and due tothe bi-directional nature of the circuit in FIG. 3, the incoming signaltraveling through the circuit in FIG. 3 from the point 261 to the leftmay either be a signal received from an antenna or a signal which is tobe transmitted to an antenna.

FIG. 4 illustrates another exemplary embodiment of the presentinvention, where two unidirectional channels are combined into onechannel. In this case, the first transistor 340 and the secondtransistor 350 are again connected in a “transmit/receive”configuration, but no feed-back mechanism between the two transistors isused, since the transistor configuration is used to direct a signal intwo different directions.

For this purpose, the first transistor 340 is connected to a firstimpedance matching network 310 and to a common impedance matchingnetwork 320 for both the first transistor 340 and the second transistor350. The second transistor 350 in turn, is connected to a secondimpedance matching network 330 and also to the common impedance matchingnetwork 320 for both transistors. Both transistors are connected in a socalled “common source” configuration, i.e. their source terminals aregrounded. The transistors are connected to each other in such a way thatthe gate terminal of the second transistor 350 is connected to the drainterminal of the first transistor 340. Furthermore, the first impedancematching network 310 is connected to the gate terminal of the firsttransistor 340, whereas the common impedance matching network 320 isconnected to the drain terminal of the first transistor 340 and the gateterminal of the second transistor 350. Finally, the second impedancematching network 330 is connected to the drain terminal of the secondtransistor 350.

In this embodiment, the first impedance matching network 310 is actingas the input impedance matching network for the first transistor 340,while the common impedance matching network 320 is used as the outputimpedance matching network for the first transistor 340. On the otherhand, the second impedance matching network 330 takes on the role of theoutput impedance matching network for the second transistor 350, whilethe common impedance matching network 320 acts as an input impedancematching network for the second transistor 350.

The two resistors 370 and 371 are connected between the drain and gateterminals for the first and second transistors 340 and 350.

Switching (and amplification) of a signal traveling through the circuitof FIG. 4 from the ingress/egress point 363 to the right, where theswitching direction is indicated by the curved arrow 360, is performedby biasing the first transistor 340 in pinch-off mode, thus effectivelyturning off the first transistor and biasing the second transistor 350above threshold thus allowing the signal to pass through theingress/egress point 363, the common impedance matching network 320, thesecond transistor 350 and the second impedance matching network 330.

In FIG. 5, an identical circuit as in FIG. 4 is shown, where theswitching (and amplification direction is indicated by the curved arrow361. In order to perform switching (and amplification) of a signal inthis direction, the second transistor 350 is biased in pinch-off mode,hence being turned off, while the first transistor 340 is biased abovethreshold, thus opening the path for a signal traveling from the ingresspoint 362 to the right and passing through the first impedance matchingnetwork 310, the first transistor 340 and common impedance matchingnetwork 320 for the two transistors.

Of course, the invention is not limited to the embodiment shown in FIGS.4 and 5. One could connect N transistors in parallel in theconfiguration depicted in these figures where each transistor to theleft of the common impedance matching network 320 would have its ownfirst impedance matching network and where each transistor to the rightof the second impedance matching network would have its own thirdimpedance matching network. In this fashion N/2 unidirectional channelsmay be combined into one channel.

FIG. 6 illustrates yet another embodiment of the present invention wherea first transistor 450 and a second transistor 460 are connected inparallel, where the drain terminal of the first transistor 450 isconnected to the drain terminal of the second transistor 460. The gateterminals of each transistor are connected to respective input impedancematching networks 430 and 410, while the first transistor 450 and thesecond transistor 460 share a common output impedance matching network420. It should be mentioned that the two input impedance matchingnetworks 410 and 430 need not be and usually are not identical. In thesituation depicted in FIG. 6 the second transistor 460 is biased by afirst biasing network (not shown) into pinch-off mode and thus turnedoff, while the first transistor 450 is biased above threshold by asecond biasing network (not shown) and therefore turned on. Thecommunication channel is then defined by a signal passing through thefirst ingress node 463, the first impedance matching network 410, thefirst transistor 450, the common output impedance matching network 420and leaving the circuit through the egress node 465, the direction ofsignal flow (and amplification) shown by the arrow 461.

In FIG. 7, the same embodiment as in FIG. 6 is illustrated but with thefirst transistor 450 biased in pinch-off mode and therefore turned off,while the second transistor 460 is biased above threshold, thus beingturned on. In this situation, the communication channel is defined bythe signal entering the circuit at the second ingress node 464, thesecond input impedance matching network 430, the second transistor 460,the common output impedance matching network 420 and leaving the circuitthrough the egress node 465 with the direction of signal flow indicatedby the arrow 462.

The advantage of this embodiment is the possibility of combining two ormore channels into one channel without using a switch and thusintroducing signal leakage and losses in the electric circuit.

Of course, in the embodiment illustrated in FIGS. 6 and 7 the number oftransistors connected in parallel is not limited to only twotransistors. Basically, N transistors may be connected in series thusbeing able to combine N channels into one channel by using one orseveral biasing networks to turn the appropriate transistors on or off.

FIG. 8 illustrates yet another embodiment of the present invention wherea signal may be directed towards different paths. A first transistor 550and a second transistor 560 are connected in parallel, whereby the firsttransistor 550 is further connected to a first output impedance matchingnetwork 510 and the second transistor 560 is connected to second outputimpedance matching network 530. Additionally, the first and secondtransistors 550 and 560 are connected to a common input impedancematching network 520. Using a first and a second biasing network (notshown) the second transistor 560 is biased in pinch-off mode (thusswitched off) and the first transistor 550 is biased above threshold andthus turned on.

In the situation illustrated in the figure, the channel along which thesignal is then flowing is defined by the ingress node 565 where thesignal is entering the circuit, the common input impedance matchingnetwork 520, the first transistor 550, the second output impedancematching network 510 and the first egress node 563 through which thesignal is leaving the circuit. The direction of signal flow andamplification is then indicated by the arrow 561.

The same embodiment is illustrated in FIG. 9, where however the firsttransistor 550 is switched off (indicated by a dotted symbol) and thesecond transistor 560 is switched on, directing the signal entering thecircuit through the ingress node 565 through the common input impedancematching network 520, the second transistor 560, the second outputimpedance matching network 530 and leaving the circuit through thesecond egress node 564.

FIG. 10 illustrates an embodiment of the present invention where twobi-directional communication channels are combined into one channel.

The first channel is defined by the signal entering the circuit at thesecond ingress/egress node 681, the second impedance matching network620, the transistor 670, the third impedance matching network 630, andthe third egress/ingress node 682 through which the signal is leavingthe circuit. The direction of signal amplification is indicated by thearrow 671. In order for the received or transmitted signal to flow inthis direction, transistors 640, 650 and 660 are biased in pinch-offmode (which is illustrated by dotted symbols) and thus are turned off,while transistor 670 is biased above threshold and therefore turned on.Impedance matching between the first group of transistors (first andsecond transistors 640 and 650) is in this example embodiment achievedby a resistor 635, while matching between the second group oftransistors (third and fourth transistors 660 and 670) by a resistor636. It should be noted however, that this impedance matching mayequally be achieved by another impedance element or a matching network.

FIG. 11 illustrates with the arrow 672 the direction of amplificationfor the second channel which is defined by the second ingress/egressnode 681, the second impedance matching network 620, the transistor 640,the first impedance matching network 610, and the first egress/ingressnode 680 through which the signal is leaving the circuit. In order forthe received signal or the signal to be transmitted to be amplified inthis direction, transistors 650, 660 and 670 are biased in pinch-offmode and therefore turned off (which is indicated by dotted symbols),whereas the transistor 640 is biased above threshold and thereforeturned on.

The first, second and third nodes 680, 681, 682 are both ingress andegress nodes, since the amplification circuit in FIGS. 10 and 11 arebi-directional.

It is worth mentioning that the embodiments in FIGS. 10 and 11 mayinclude up to N transistor pairs connected into the anti-parallelconfiguration shown in these figures. In this way N bi-directionalchannels may be combined into one channel.

In the embodiments of the invention described above, although notillustrated, biasing networks, such as networks comprising voltagesources are used to bias the transistors into pinch-off mode and abovethreshold in order to turn them off and on respectively.

1. A bi-directional amplifier for amplification of signals received orsignals to be transmitted in a communication circuit, comprising: atleast one first biased semiconductor amplification element coupled to afirst impedance matching network; at least one second biasedsemiconductor amplification element coupled to a second impedancematching network; a first device for biasing said at least one firstbiased semiconductor amplification element and a second device forbiasing said at least one second biased semiconductor amplificationelement wherein the direction of signal amplification in saidbi-directional amplifier is controlled by said first or said seconddevice for biasing said at least one first or second biasedsemiconductor amplification element; said first impedance matchingnetwork is a first common impedance matching network for said at leastone first biased semiconductor amplification element and for said atleast one second biased semiconductor amplification element; said secondimpedance matching network is a second common impedance matching networkfor said at least one first biased semiconductor element, wherein thefirst common impedance network is an output impedance matching networkfor said at least one first biased semiconductor element and an inputimpedance matching network for said at least one second biasedsemiconductor element, and the second common impedance matching networkis an output impedance matching network for said at least one secondbiased semiconductor element and an input impedance matching network forsaid at least one first biased semiconductor element, the bi-directionalamplifier further comprises means for achieving equal impedances forsaid at least one first and said at least one second biasedsemiconductor elements, wherein said means is connected between said atleast one first and said at least one second biased semiconductorelements.
 2. The bi-directional amplifier according to claim 1, wheresaid at least one first and said second biased semiconductoramplification elements are connected in an anti-parallel configuration.3. The bi-directional amplifier according to claim 1, wherein saidanti-parallel configuration further comprises parallel feedback.
 4. Thebi-directional amplifier according to claim 1, wherein said first orsecond biased semiconductor amplification element is adapted to amplifya received signal in one direction and a transmitted signal in theopposite direction.
 5. The bi-directional amplifier according to claim1, wherein a third impedance matching network is coupled between said atleast one first and said at least one second biased semiconductoramplification elements, respectively.
 6. The bi-directional amplifieraccording to claim 5, wherein said amplifier is adapted to direct saidsignal to one of a plurality of available signal paths.
 7. Thebi-directional amplifier according to claim 5, wherein said at least onefirst biased semiconductor amplification element is further coupled inparallel with N−1 biased semiconductor amplification elements, eachcoupled to their individual impedance matching networks, wherein saidN−1 biased semiconductor amplification elements are coupled in parallelto said at least one second biased semiconductor amplification element,said at least one first biased semiconductor amplification element andsaid at least one second biased semiconductor amplification elementsadapted to act as a N-to-1 or 1-to-N switch.
 8. The bi-directionalamplifier according to claim 5, wherein said at least one second biasedsemiconductor amplification element is further coupled in parallel withN−1 other biased semiconductor amplification elements, each coupled totheir individual impedance matching networks, where said at least onefirst and said at least one second biased semiconductor amplificationelement and said N−1 other biased semiconductor amplification elementscoupled in parallel with said at least one second semiconductoramplification element are adapted to act as a 1-to-N or N-to-1 switch.9. The bi-directional amplifier according to claim 5, wherein said firstbiased semiconductor amplification element is coupled in parallel withN−1 other first biased semiconductor amplification elements each coupledto their individual impedance matching networks, said second biasedsemiconductor amplification element coupled in parallel with N−1 othersecond biased semiconductor amplification elements each coupled to theirindividual impedance matching networks, said N−1 biased semiconductoramplification elements coupled in parallel with said first biasedsemiconductor amplification element, said first biased semiconductoramplification element, said second biased semiconductor amplificationelement, said N−1 coupled in parallel with said second biasedsemiconductor amplification element are adapted to act as abi-directional N-to-N switch.
 10. The bi-directional amplifier accordingto claim 5, wherein said at least one first biased semiconductoramplification element is coupled into a parallel feedback configurationwith at least one impedance element, said at least one first biasedsemiconductor amplification element being coupled to at least one firstimpedance matching network, a common impedance matching network and atleast one second biased semiconductor amplification element coupled in aparallel feedback configuration with another impedance element, said atleast one second biased semiconductor amplification element beingfurther coupled to a second impedance matching network.
 11. Thebi-directional amplifier according to claim 1, wherein at least onefirst pair of biased semiconductor amplification elements comprising atleast one first biased semiconductor amplification element and at leastone second biased semiconductor amplification element are coupled in ananti-parallel configuration to each other, said at least one pair ofbiased semiconductor amplification elements being further coupled to atleast one first impedance matching network and one common impedancematching network, said bi-directional amplifier further comprising atleast one second pair of biased semiconductor amplification elementscomprising at least one third biased semiconductor amplification elementand at least one fourth biased semiconductor amplification elementcoupled in an anti-parallel configuration to each other, where said atleast one second pair of biased semiconductor amplification elements iscoupled to said common impedance matching network and at least onesecond impedance matching network.
 12. The bi-directional amplifieraccording claim 1, wherein said communication circuit comprises amicrowave-based communication circuit.
 13. The bi-directional amplifieraccording to claim 1, wherein said at least one first and said at leastone second semiconductor amplification elements comprise discretesemiconductor components operable in the microwave frequency range. 14.The bi-directional amplifier according to claim 1, wherein said at leastone first and said at least one second semiconductor amplificationelements are integrated into an integrated circuit device.
 15. Thebi-direction amplifier according to claim 1, wherein said first andsecond biased semiconductor amplification elements comprise elementsfrom the group of bi-polar transistors, Heterojunction Bi-polarTransistors (HBTs), Metal Oxide Semiconductor Field Effect Transistors(MOSFETs), High Electron Mobility Transistors (HEMTs) and other types ofbiased semiconductor amplification elements suitable for use asamplification elements.
 16. A method for bi-directional amplification ofsignals received or signals to be transmitted in a communication circuitcomprising the steps of: obtaining a bi-directional amplifier comprisingat least one first biased semiconductor amplification element coupled toa first impedance matching network, at least one second biasedsemiconductor amplification element coupled to a second impedancematching network, the bi-directional amplifier having a first device forbiasing said first biased semiconductor amplification element and asecond device for biasing said second biased semiconductor amplificationelement, wherein said first impedance matching network is a first commonimpedance matching network for said at least one first biasedsemiconductor amplification element and for said at least one secondbiased semiconductor amplification element, and said second impedancematching network is a second common impedance matching network for saidat least one first biased semiconductor element, wherein the firstcommon impedance network is an output impedance matching network forsaid at least one first biased semiconductor element and an inputimpedance matching network for said at least one second biasedsemiconductor element, and the second common impedance matching networkis an output impedance matching network for said at least one secondbiased semiconductor element and an input impedance matching network forsaid at least one first biased semiconductor element, the bi-directionalamplifier further comprises means for achieving equal impedances forsaid at least one first and said at least one second biasedsemiconductor elements, wherein said means is connected between said atleast one first and said at least one second biased semiconductorelements; and amplifying a signal received at said first or said secondbiased semiconductor amplification element or a signal to be transmittedfrom said first or said second biased semiconductor amplificationelement by biasing said second biased semiconductor amplificationelement for zero current, while biasing said first biased semiconductoramplification element for non-zero current or by biasing said firstbiased semiconductor amplification element for zero current, whilebiasing said second based semiconductor for non-zero current.
 17. Themethod according to claim 16, wherein said step of obtaining abi-directional amplifier further comprises the step of coupling said atleast one first and said at least one second biased semiconductoramplification element into an anti-parallel configuration to each other.18. The method according to claim 16, wherein said step of obtaining abidirectional amplifier further comprises providing parallel feedbackfor said first and said second biased semiconductor amplificationelements.
 19. The method according to one of claim 16, wherein said stepof obtaining a bi-directional amplifier further comprises amplifying areceived signal in one direction and a transmitted signal in theopposite direction or vice versa on the same transmission line.
 20. Abi-directional transceiver for signals in a communication circuitcomprising: at least one first biased semiconductor amplificationelement with a corresponding first impedance matching network and atleast one second biased semiconductor amplification element with asecond impedance matching network; and a first device for biasing saidfirst biased semiconductor amplification element and a second device forbiasing said second biased semiconductor amplification element and inthat said first and said second device for biasing are adapted toalternatively bias said first and said second biased semiconductoramplification elements; said first impedance matching network is a firstcommon impedance matching network for said at least one first biasedsemiconductor amplification element and for said at least one secondbiased semiconductor amplification element; said second impedancematching network is a second common impedance matching network for saidat least one first biased semiconductor element, wherein the firstcommon impedance network is an output impedance matching network forsaid at least one first biased semiconductor element and an inputimpedance matching network for said at least one second biasedsemiconductor element, and the second common impedance matching networkis an output impedance matching network for said at least one secondbiased semiconductor element and an input impedance matching network forsaid at least one first biased semiconductor element, means forachieving equal impedances for said at least one first and said at leastone second biased semiconductor elements, wherein said means isconnected between said at least one first and said at least one secondbiased semiconductor elements.
 21. An integrated circuit comprising abi-directional amplifier for amplification of signals received orsignals to be transmitted in a communication circuit, comprising: atleast one first biased semiconductor amplification element coupled to afirst impedance matching network, at least one second biasedsemiconductor amplification element coupled to a second impedancematching network, a first device for biasing said first biasedsemiconductor amplification element and a second device for biasing saidsecond biased semiconductor amplification element wherein the directionof signal amplification is controlled by said first or said seconddevice for biasing said first or second biased semiconductoramplification element, said first impedance matching network is a firstcommon impedance matching network for said at least one first biasedsemiconductor amplification element and for said at least one secondbiased semiconductor amplification element, said second impedancematching network is a second common impedance matching network for saidat least one first biased semiconductor element, wherein the firstcommon impedance network is an output impedance matching network forsaid at least one first biased semiconductor element and an inputimpedance matching network for said at least one second biasedsemiconductor element, and the second common impedance matching networkis an output impedance matching network for said at least one secondbiased semiconductor element and an input impedance matching network forsaid at least one first biased semiconductor element, the bi-directionalamplifier further comprises means for achieving equal impedances forsaid at least one first and said at least one second biasedsemiconductor elements, wherein said means is connected between said atleast one first and said at least one second biased semiconductorelements.
 22. A mobile terminal, comprising: a bi-directional amplifierfor amplification of signals received or signals to be transmitted in acommunication circuit, said bi-directional amplifier further comprising:at least one first biased semiconductor amplification element coupled toa first impedance matching network; at least one second biasedsemiconductor amplification element coupled to a second impedancematching network; a first device for biasing said first biasedsemiconductor amplification element and a second device for biasing saidsecond biased semiconductor amplification element wherein the directionof signal amplification is controlled by said first or said seconddevice for biasing said first or second biased semiconductoramplification element; and said first impedance matching network is afirst common impedance matching network for said at least one firstbiased semiconductor amplification element and for said at least onesecond biased semiconductor amplification element; said second impedancematching network is a second common impedance matching network for saidat least one first biased semiconductor element, wherein the firstcommon impedance network is an output impedance matching network forsaid at least one first biased semiconductor element and an inputimpedance matching network for said at least one second biasedsemiconductor element, and the second common impedance matching networkis an output impedance matching network for said at least one secondbiased semiconductor element and an input impedance matching network forsaid at least one first biased semiconductor element, the bi-directionalamplifier further comprises means for achieving equal impedances forsaid at least one first and said at least one second biasedsemiconductor elements, wherein said means is connected between said atleast one first and said at least one second biased semiconductorelements.
 23. A telecommunications infrastructure component, comprising:a bi-directional amplifier for amplification of signals received orsignals to be transmitted in a communication circuit, saidbi-directional amplifier further comprising: at least one first biasedsemiconductor amplification element coupled to a first impedancematching network; at least one second biased semiconductor amplificationelement coupled to a second impedance matching network; a first devicefor biasing said first biased semiconductor amplification element and asecond device for biasing said second biased semiconductor amplificationelement wherein the direction of signal amplification is controlled bysaid first or said second device for biasing said first or second biasedsemiconductor amplification element; said first impedance matchingnetwork is a first common impedance matching network for said at leastone first biased semiconductor amplification element and for said atleast one second biased semiconductor amplification element; said secondimpedance matching network is a second common impedance matching networkfor said at least one first biased semiconductor element, wherein thefirst common impedance network is an output impedance matching networkfor said at least one first biased semiconductor element and an inputimpedance matching network for said at least one second biasedsemiconductor element, and the second common impedance matching networkis an output impedance matching network for said at least one secondbiased semiconductor element and an input impedance matching network forsaid at least one first biased semiconductor element, the bi-directionalamplifier further comprises means for achieving equal impedances forsaid at least one first and said at least one second biasedsemiconductor elements, wherein said means is connected between said atleast one first and said at least one second biased semiconductorelements.